PR/094361 | Analog Design Staff Engineer (SOC/ SerDes)

JOB RESPONSIBILITIES

• Participate in high-level product specifications, microarchitecture and implementation of high-speed memory interfaces 

• Perform RTL coding, LINT checking and sanity testing on implemented designs 

• Work with the verification team for lab debugging 

• Work with the software team and/or customers to solve problems, debug and tune system performance 

JOB REQUIREMENTS

• Bachelor's degree in communications, electronic engineering or computer engineering, master’s degree preferred 

• More than 6 years (staff engineer) and 10 years (senior staff engineer) of ASIC design experience, familiar with ASIC development process 

• Good Verilog HDL coding skills and EDA tools such as synthesis and timing analysis 

• Familiarity with high-speed interfaces such as DDR, SerDes, PCIe is preferred 

• Ability to solve customer problems and deliver results in a timely manner 

• Strong organizational and communication skills where English is a must and Chinese is preferred 

Interested applicants please send your resume to:

Jun Fong Khor

Email: junfong.khor@jac-recruitment.com

EA Licence: 90C3026

EA Personnel No: R1439255

We regret to inform that only shortlisted candidates will be notified.

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