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Hiring Company | 韓国系大手半導体会社 |
Location | Tokyo - 23 Wards, Chiyoda-ku |
Job Type | Permanent Full-time |
Salary | 5 million yen ~ 11 million yen |
<仕事内容>
- ディジタルロジック設計と検証
- Mixed IP, FBE(Front/Back-End), PKG,
SI(Signal Integrity) /PI(Power Integrity),
本社評価TeamまたはIP設計Teamとの協力設計
- その他臨時要求事項
<福利厚生>
社会保険完備
交通費支給
健康診断費
退職金制度
福利厚生費
Minimum Experience Level | Over 3 years |
Career Level | Mid Career |
Minimum English Level | Daily Conversation |
Minimum Japanese Level | Fluent |
Other Language | Korean - Daily Conversation |
Minimum Education Level | Bachelor's Degree |
Visa Status | Permission to work in Japan required |
・インターフェースIP、外付けメモリーコントローラーIP、プラットフォーム基盤設計、
チップ設計フロー及びチップ生産プロセスに関する確実な理解
・Lintツール技術が必須
・中級以上の英語または韓国語実力(必須事項ではありません)
・関連分野での経歴5年以上(修士修了者は3年以上)
* デジタルIC設計、Mixed IP インターフェース、プラットフォーム設計、DFT(Design For Test), FPGA検証及びディスプレイドライバーICなどでの経験を優先します。
Job Type | Permanent Full-time |
Salary | 5 million yen ~ 11 million yen |
Work Hours | 9:00 ~ 18:00 *フレックスタイム制 |
Holidays | 完全週休2日制、土日祝日、年末年始、その他 |
Company Type | Large Company (more than 300 employees) - International Company |
Non-Japanese Ratio | About half Japanese |